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EUP7966 ds7966 ver1.0 aug. 2006 1 2a low-dropout regulator with enable description the EUP7966 is a high current, fast response voltage regulator designed for use in applications requiring very low input voltage and very low dropout voltage at up to 2 amps. it operates from two input voltages : vbias provides 5v voltage to drive the gate of the n-mos power transistor, while vin is the input voltage which supplies power to the load. the use of an external bias rail allows the part to operate from ultra low vin voltage. the EUP7966 features ultra low dropout, ideal for applications where vout is very close to vin. additionally, the EUP7966 has an enable pin to further reduce power dissipation while shutdown. the EUP7966 provides excellent regulation over variations in line, load and temperature. the EUP7966 provides a power ok signal to indicate if the voltage level of vout reaches 92% of its rating value. the EUP7966 is available in the power sop-8 (fd) package. it is available with 1.2v, 1.5v, 1.8v and 2.5v internally preset outputs, that are also be able to programmed as low as 0.8v with adj pin configured with external resistors. typical application circuit features z input voltage as low as 1.2v and vbias voltage 5v z 2% output voltage z 300mv dropout @ 2a, vout=1.2v z over current and over temperature protection z enable pin z low reverse leakage (output to input) z power ok output z 1.2v, 1.5v, 1.8v and 2.5v standard voltages available and each also can be adjustable by connecting adj with external resistors z sop-8 (fd) package z rohs compliant and 100% lead (pb)-free applications z motherboards z peripheral cards z network cards z set top boxes z notebook computers figure 1. fixed output voltage
EUP7966 ds7966 ver1.0 aug. 2006 2 figure 2. adjustable output voltage block diagram figure 3.
EUP7966 ds7966 ver1.0 aug. 2006 3 pin configurations part number pin configurations EUP7966 sop-8 (fd) pin description pin sop-8 description pok 1 assert high once vout reaches 92% of its rating voltage. open-drain output. ven 2 enable input. pulling this pin below 0.4v turn s the regulator off, reducing the quiescent current to a fraction of its operating value. the device will be enabled if this pin is left open. vin 3 high current input voltage. large bulk capacitan ce should be placed closely to this pin . a 10f ceramic capacitor is recommended at this pin. vbias 4 input voltage for controlling circuit. nc 5 not connected. vout 6 the power output of the device. a pull low resistance exists when deactivate device by ven. adj 7 this pin, when grounded, sets the output voltage by the internal feedback resistors. if external feedback resistors are used , the output voltage will be vout=0.8(r1+r2)/r2 volts. gnd 8 reference ground.
EUP7966 ds7966 ver1.0 aug. 2006 4 ordering information order number package type marking operating temperature range EUP7966-12dir1 sop-8 (fd) xxxx EUP7966 t -40 c to 85c EUP7966-15dir1 sop-8 (fd) xxxx EUP7966 c -40 c to 85c EUP7966-18dir1 sop-8 (fd) xxxx EUP7966 d -40 c to 85c EUP7966-25dir1 sop-8 (fd) xxxx EUP7966 b -40 c to 85c EUP7966- ?? ?? ?? ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape & reel operating temperature range i: industry standard package type d: sop (fd) output voltage 12: 1.2v 15: 1.5v 18: 1.8v 25: 2.5v
EUP7966 ds7966 ver1.0 aug. 2006 5 absolute maximum ratings ? v bias ,v in ,input voltage -------------------------------------------------------------- 6v ? junction temperature ------------------------------------------------------------------- 150c ? storage temperature ------------------------------------------------------ -65c to +150c ? power dissipation ------------------------------------------------------------- internal limiting ? lead temperature (soldering, 10sec.) ------------------------------------------------- 260c ? thermal resistance ja , sop-8 (fd) ------------------------------------------------ 42.3c/w ? esd rating human body model ------------------------------------------------------------------- 1kv operating ratings ? v in voltage ---------------------------------------------------------------------------- 1.2 to 3.6v ? v pp voltage ----------------------------------------------------------------------------- 4.5 to 5.5v ? temperature range --------------------------------------------------------- -40c t a 85c electrical characteristics v bias = 5v, v in =v out +0.5v, i o =10ma,c in =c out =10 f, c bias =1 f ,t a =t j = 25c unless otherwise specified. EUP7966 symbol parameter conditions min typ max. unit v in input voltage range 1.2 -- 3.6 v v in =v out +0.5v,i o =10ma -- 1 1.6 i q quiescent current (ground current) v in =v out +3.6v,i o =100ma -- 1.1 2.5 ma v en =0v,v in =2.2v -- 0.1 1 i sd shutdown current v en =0v,v in =3.6v -- 0.4 5 a v bias v bias voltage range 4.2 -- 5.5 v i bh v out =1.2v -- 0.8 1.2 ma i bl v bias current v en =0v -- -- 1 a -2 -- 2 v out output voltage accuracy (fixed) t a =-40 to 85 j -3 -- 3 % line regulation v in =(v out +0.5v) to 5v, t a =-40 to 85 j -- 0.2 1 % load regulation 10ma [ adj v ref reference voltage v adj =v 0ut 0.792 0.804 0.816 v adjust pin current -- -- 1 a adjust pin threshold 0.17 0.22 0.27 v
EUP7966 ds7966 ver1.0 aug. 2006 6 electrical characteristics v bias = 5v, v in =v out +0.5v, i o =10ma,c in =c out =10 f, c bias =1 f ,t a =t j = 25c unless otherwise specified. EUP7966 symbol parameter conditions min typ max. unit ven v enh v en pin voltage high t a =-40 to 85 j 1.6 -- -- v e enl v en pin voltage low t a =-40 to 85 j -- -- 0.4 v v en pin bias current v en =0v -- -- 1 a pok v thpok v out power ok voltage -- 90 -- % v hypok hysteresis -- 7.5 -- % over temperature protection (otp) t ot over temperature -- 155 -- j t othy over temperature hysteresis -- 30 -- j under voltage lock out (uvlo) vbias thereshold -- 3.9 -- v hysteresis -- 20 -- mv
EUP7966 ds7966 ver1.0 aug. 2006 7 1.51.82.12.42.73.03.33.6 0.0 0.3 0.6 0.9 1.2 1.5 input voltage (v) quiescent current vs. input voltage quiescent current (ma) -40 -20 0 20 40 60 80 100 0.00 0.25 0.50 0.75 1.00 1.25 1.50 temperature ( o c) quiescent current (ma) quiescent current vs. temperature 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 0.0 0.2 0.4 0.6 0.8 1.0 vbias current vs. input voltage vbias current (ma) input voltage (v) -40 -20 0 20 40 60 80 100 0.00 0.25 0.50 0.75 1.00 temperature ( o c) vbias current (ma) vbias current vs. temperature 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 1.176 1.184 1.192 1.200 1.208 1.216 1.224 output voltage vs. input voltage output voltage (v) input voltage (v) 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 1.176 1.184 1.192 1.200 1.208 1.216 1.224 output voltage vs. output current output voltage (v) output current (a) typical operating characteristics figure 4. figure 5. figure 6. figure 7. figure 8. figure 9.
EUP7966 ds7966 ver1.0 aug. 2006 8 -40-200 20406080100 1.176 1.182 1.188 1.194 1.200 1.206 1.212 1.218 1.224 output voltage vs. temperature i o = 1a i o = 0a output voltage (v) temperature ( o c) 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 0.788 0.792 0.796 0.800 0.804 0.808 0.812 input voltage (v) reference voltage (v) reference voltage vs. input voltage -40-20 0 20406080100 0.788 0.792 0.796 0.800 0.804 0.808 0.812 temperature ( o c) reference voltage (v) reference voltage vs. temperature 0.00.51.01.52.0 0 50 100 150 200 250 300 350 400 t=-40 o c t=25 o c t=85 o c dropout voltage vs. load current dropout voltage (mv) load current (a) figure 10. figure 11. figure 12. figure 13. figure 14. figure 15.
EUP7966 ds7966 ver1.0 aug. 2006 9 figure 16. figure 17. figure 18. figure 19. figure 20.
EUP7966 ds7966 ver1.0 aug. 2006 10 application note external capacitors to assure regulator stability, input and output capacitors are required as shown in the typical application circuit. output capacitor the EUP7966 is designed specifically to work with very small ceramic output capacitors. a ceramic capacitor (temperature characteristics x7r, x5r, z5u, or y5v) in 4.7 to 22 f range with 5m ? to 200m ? esr range is suitable in the EUP7966 application circuit. the output capacitor must meet the requirement for minimum amount of capacitance and also have an esr (equivalent series resistance) value which is within a stable range (5m ? to 200m ? ) input capacitor the input capacitor must be at least 10 f ceramic, but can be increased without limit. it?s purpose is to provide a low source impedance for the regulator input. bias capacitor the 1 f capacitor on the bias line can be any good quality capacitor (ceramic is recommended). bias voltage the bias voltage is an external voltage rail required to get gate drive for the n-fet pass transistor. bias voltage must be in the range of 4.5 ? 5.5v to assure proper operation of the part. shutdown operation pulling down the ven pin will turn-off the regulator. ven pin must be actively terminated through a pull-up resistor (10 k [ to 100 k [ ) for a proper operation. if this pin is driven from a source that actively pulls high and low (such as a cmos rail to rail comparator) , the pull-up resistor is not required. this pin must be tied to vin if not used. power dissipation /heatsinking a heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. under all possible conditions, the junction temperature must be within the range specified under operating conditions. the total power dissipation of the device is given by: p d =(v in -v out )i out +(v in )i gnd where i gnd is the operating ground current of the device. the maximum allowable temperature rise (t rmax ) depends on the maximum ambient temper -ature (t amax ) of the appli cation, and the maximum allowable junction temperature (t jmax ): t rmax =t jmax -t amax the maximum allowable value for junction to ambient thermal resistance, ja , can be calculated using the formula: ja =t rmax /p d heatsinking for the sop-8 (fd) package is accomplished by allowing heat to flow through the ground slug on the bottom of the package into the copper on the pc board. the heat slug must be soldered down to a copper plane to get good heat transfer. it can also be connected through vias to internal copper planes .since the heat slug is at ground potential, traces must not be routed under it which are not at ground potential. under all possible conditions, the junction temperature must be within the range specified under operating conditions.
EUP7966 ds7966 ver1.0 aug. 2006 11 packaging information sop-8 (fd) dimension in millimeters dimension in inches symbols min. max. min. max. a 4.80 5.00 0.189 0.197 b 5.80 6.20 0.228 0.244 c 3.80 4.00 0.150 0.157 d 1.194 1.346 0.047 0.053 e 1.45 1.55 0.057 0.061 h 0.00 0.10 0.000 0.004 f 0.33 0.51 0.013 0.020 l1 0.19 0.25 0.007 0.010 l2 0.40 1.27 0.016 0.050 m 0 8 0 8 n 40 50 40 50 a1 2.6 2.8 0.102 0.110 b1 2.4 2.6 0.095 0.102 z bottom exposed pad ues as much copper area as possible standard solder map y x

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